In U.S. Pat. No. 4,224,533, E. Lai discloses an edge-triggered metal-oxide semiconductor (MOS) field-effect transistor (FET) memory circuit containing a flip-flop whose logic state is controlled by a plurality of identical trigger circuits, each responsive to a different clocking signal. When an appropriate set input signal is supplied to any particular one of the trigger circuits and its clocking signal makes a low-to-high transition, the particular trigger circuit "sets" the flip-flop to a first logic state which is typically a logical "1" (hereafter simply a "1"). The term "set" as applied to the flip-flop means that it is forced into the first logic state if it is not initially there and is left there if it is already there. Likewise, when an appropriate reset input signal is supplied to the particular trigger circuit and its clocking signal makes a low-to-high transition, the trigger circuit "resets" the flip-flop to an opposite second logic state which is typically a logical "0" (hereafter simply a "0"). The term "reset" as applied to the flip-flop means that it is forced into the second logic state if it is not initially there and is left there if it is already there.
The true and complementary logical output signals of the flip-flop in this prior art device are fed back to a trigger inhibiting circuit connected to the particular trigger circuit. After it sets or resets the flip-flop, these signals enable the inhibiting circuit to inhibit it from further setting or resetting, respectively, the flip-flop while its clocking signal is still high. Because the set and reset signals do not affect the flip-flop when the clocking signal of the particular trigger circuit is low, it is effectively inhibited from further setting or resetting the flip-flop until its clocking signal makes another low-to-high transition. This allows the memory circuit to be controlled by another one of the trigger circuits during the intervening time period. This operational technique is particularly suitable in more advanced applications.